SH7101 datasheet(88/560 Pages) RENESAS

88 / 560 page

Section 3 MCU Operating Modes

Rev.1.00 Sep. 18, 2008 Page 54 of 522

REJ09B0069-0100

ROM: 256 kbytes, RAM: 8 kbytes

H'00000000

H'FFFF7FFF

H'FFFF8000

H'0003FFFF

H'00040000

H'FFFFBFFF

H'FFFFC000

CS0 space

On-chip peripheral I/O

registers

On-chip RAM

Reserved

H'FFFFFFFF

H'FFFFDFFF

H'FFFFE000

H'00000000

H'FFFF7FFF

H'FFFF8000

H'0003FFFF

H'00000000

H'0003FFFF

H'00040000

H'001FFFFF

H'00200000

H'0023FFFF

H'00240000

H'FFFFBFFF

H'FFFFC000

H'FFFFFFFF

H'FFFFDFFF

H'FFFFE000

H'FFFF8000

H'FFFFBFFF

H'FFFFFFFF

H'FFFFE000

On-chip ROM

On-chip RAM

On-chip peripheral I/O

registers

On-chip RAM

On-chip peripheral I/O

registers

Mode 0

Mode 2

Mode 3

Figure 3.7 Address Map for Operating Modes of SH7105

3.5

Initial State of This LSI

In this LSI, some on-chip modules are set to the module standby state as its initial state for power

down.

Therefore, to operate those modules, it is necessary to clear module standby state. For details, refer

to section 18, Power-Down Modes.

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