SH7101 datasheet(70/560 Pages) RENESAS

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Section 2 CPU

Rev.1.00 Sep. 18, 2008 Page 36 of 522

REJ09B0069-0100

Instruction

Instruction Code

Operation

Execu-

tion

States

T Bit

DMULU.L Rm,Rn

0011nnnnmmmm0101

Unsigned operation of

× Rm → MACH,

MACL 32

× 32 → 64 bits

2 to 4*

—

0100nnnn00010000

Rn – 1

→ Rn, when Rn

is 0, 1

→ T. When Rn is

nonzero, 0

→ T

Comparison

result

EXTS.B

Rm,Rn

0110nnnnmmmm1110

Byte in Rm is sign-

extended

→ Rn

—

EXTS.W

Rm,Rn

0110nnnnmmmm1111

Word in Rm is sign-

extended

→ Rn

—

EXTU.B

Rm,Rn

0110nnnnmmmm1100

Byte in Rm is zero-

extended

→ Rn

—

EXTU.W

Rm,Rn

0110nnnnmmmm1101

Word in Rm is zero-

extended

→ Rn

—

MAC.L

@Rm+,@Rn+ 0000nnnnmmmm1111

Signed operation of

(Rn)

× (Rm) + MAC →

MAC 32

× 32 + 64 →

64 bits

(2 to 4)*

—

MAC.W

@Rm+,@Rn+ 0100nnnnmmmm1111

Signed operation of

(Rn)

× (Rm) + MAC →

MAC 16

× 16 + 64 →

64 bits

3/(2)*

—

MUL.L

Rm,Rn

0000nnnnmmmm0111

× Rm → MACL,

× 32 → 32 bits

2 to 4*

—

MULS.W

Rm,Rn

0010nnnnmmmm1111

Signed operation of

× Rm → MACL 16 ×

→ 32 bits

1 to 3*

—

MULU.W

Rm,Rn

0010nnnnmmmm1110

Unsigned operation of

× Rm → MACL 16 ×

→ 32 bits

1 to 3*

—

NEG

Rm,Rn

0110nnnnmmmm1011

0 – Rm

→ Rn

—

NEGC

Rm,Rn

0110nnnnmmmm1010

0 – Rm – T

→ Rn,

Borrow

→ T

Borrow

SUB

Rm,Rn

0011nnnnmmmm1000

Rn – Rm

→ Rn

—

SUBC

Rm,Rn

0011nnnnmmmm1010

Rn – Rm – T

→ Rn,

Borrow

→ T

Borrow

SUBV

Rm,Rn

0011nnnnmmmm1011

Rn – Rm

→ Rn,

Underflow

→ T

Overflow

Note:

The normal number of execution states is shown. (The number in parentheses is the

number of states when there is contention with the preceding or following instructions.)

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