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SH7101 Datasheet(PDF) 14 Page - Renesas Technology Corp

Part # SH7101
Description  32-Bit RISC Microcomputer
PDF  560 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7101 Datasheet(HTML) 14 Page - Renesas Technology Corp

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Rev.1.00 Sep. 18, 2008 Page xiv of xxxiv
REJ09B0069-0100
9.3.2
Timer Control/Status Register (TCSR)................................................................ 273
9.3.3
Reset Control/Status Register (RSTCSR) ............................................................ 275
9.4
Operation .......................................................................................................................... 276
9.4.1
Watchdog Timer Mode ........................................................................................ 276
9.4.2
Interval Timer Mode ............................................................................................ 277
9.4.3
Clearing Software Standby Mode ........................................................................ 278
9.4.4
Timing of Setting the Overflow Flag (OVF) ....................................................... 278
9.4.5
Timing of Setting the Watchdog Timer Overflow Flag (WOVF)........................ 279
9.5
Interrupt Source ................................................................................................................ 279
9.6
Usage Notes ...................................................................................................................... 279
9.6.1
Notes on Register Access..................................................................................... 279
9.6.2
TCNT Write and Increment Contention .............................................................. 281
9.6.3
Changing CKS2 to CKS0 Bit Values .................................................................. 281
9.6.4
Changing between Watchdog Timer/Interval Timer Modes................................ 281
9.6.5
System Reset by
WDTOVF Signal...................................................................... 282
9.6.6
Internal Reset in Watchdog Timer Mode............................................................. 282
9.6.7
Manual Reset in Watchdog Timer Mode ............................................................. 282
9.6.8
Notes on Using
WDTOVF Pin ............................................................................ 282
Section 10 Serial Communication Interface (SCI) ............................................283
10.1
Features ............................................................................................................................. 283
10.2
Input/Output Pins .............................................................................................................. 285
10.3
Register Descriptions ........................................................................................................ 285
10.3.1 Receive Shift Register (RSR) .............................................................................. 286
10.3.2 Receive Data Register (RDR) .............................................................................. 286
10.3.3 Transmit Shift Register (TSR) ............................................................................. 286
10.3.4 Transmit Data Register (TDR)............................................................................. 286
10.3.5 Serial Mode Register (SMR) ............................................................................... 287
10.3.6 Serial Control Register (SCR).............................................................................. 288
10.3.7 Serial Status Register (SSR) ................................................................................ 290
10.3.8 Serial Direction Control Register (SDCR)........................................................... 292
10.3.9 Bit Rate Register (BRR) ...................................................................................... 292
10.4
Operation in Asynchronous Mode .................................................................................... 301
10.4.1 Data Transfer Format........................................................................................... 301
10.4.2 Receive Data Sampling Timing and Reception Margin in
Asynchronous Mode ............................................................................................ 303
10.4.3 Clock.................................................................................................................... 304
10.4.4 SCI Initialization (Asynchronous Mode) ............................................................. 305
10.4.5 Data Transmission (Asynchronous Mode)........................................................... 306
10.4.6 Serial Data Reception (Asynchronous Mode)...................................................... 308



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