SH7101 datasheet(173/560 Pages) RENESAS

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Section 8 Multifunction Timer Pulse Unit (MTU)

Rev.1.00 Sep. 18, 2008 Page 139 of 522

REJ09B0069-0100

Table 8.20

TIORL_3 (Channel 3)

Description

Bit 7

IOD3

Bit 6

IOD2

Bit 5

IOD1

Bit 4

IOD0

TGRD_3

Function

TIOC3D Pin Function

Output disabled

Output

compare

Initial output is 0

0 output at compare match

Initial output is 0

1 output at compare match

Initial output is 0

Toggle output at compare match

Output value retained

Initial output is 1

0 output at compare match

Initial output is 1

1 output at compare match

Initial output is 1

Toggle output at compare match

Input capture at rising edge

Input capture at falling edge

Input

capture

Input capture at both edges

Legend: x: Don’t care

Note:

When the BFB bit in TMDR_3 is set to 1 and TGRD_3 is used as a buffer register, this

setting is invalid and input capture/output compare is not generated.

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