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SH7785 Datasheet(PDF) 53 Page - Renesas Technology Corp |
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SH7785 Datasheet(HTML) 53 Page - Renesas Technology Corp |
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53 / 1692 page  1. Overview Rev.1.00 Jan. 10, 2008 Page 23 of 1658 REJ09B0261-0100 123456789 10 11 12 13 14 15 16 17 18 19 20 21 22 123456789 10 11 12 13 14 15 16 17 18 19 20 21 22 VSS A25 SCIF5_TXD /HAC1_ SYNC/SSI1_ WS SCIF5_SCK /HAC1_SD OUT/SSI1_ SDATA SIOF_MCLK / HAC_RES SIOF_TXD/ HAC0_SDO UT/SSI0_ SDATA SCIF1_ TXD SCIF1_ SCK SCIF0_SCK /HSPI_CLK / FRE PRESET VSS MDM3 MDQ26 MDQ28 MDQ16 MDQ22 MA14 MA10 MVRE F VSS MCK1 VSS A24 VDDQ SCIF5_RXD /HAC1_ SDIN/SSI1_ SCK VDDQ SIOF_SYNC /HAC0_ SYNC/ SSI0_WS VSS SCIF1_ RXD VDDQ SCIF0_TXD /HSPI_TX/ FWE VSS VSS MDQ31 VSS MDQ23 VDD- DDR MDQ17 VSS MCS VDD- DDR MCK1 VDD- DDR MCK0 A21 A22 A23 MODE11/ SCIF4_SCK /FD3 HAC1_BIT CLK/SSI1_ CLK SIOF_SCK /HAC0_BIT CLK/SSI0_ CLK MODE6/ SIOF_SYNC MODE5/ SIOF_MCLK SCIF0_RXD /HSPI_RX/ FRB MODE1/ IRL5/FD5 MODE0 / IRL4/ FD4 MDQS 3 MDQ25 MDQS 2 MDQ18 MDQ21 MA6 MCAS MBA1 MBKPRST MCK0 VSS A19 VDDQ A20 VSS MODE9/S CIF4_TXD/ FD1 VDDQ SIOF_RXD /HAC0_SDI N/SSI0_ SCK VSS SCIF0_CTS / INTD/F CE MODE2/ IRL6/FD6 VDDQ MDQS3 VDD- DDR MDQS2 VSS MA8 VDD- DDR MRAS VSS MODT VDD- DDR MCKE A15 A16 A17 A18 CS5 CS6 MODE10/ SCIF4_RXD /FD2 MODE8/ SCIF3_SCK/ FD0 SCIF0_RTS / HSPI_CS / FSE MODE3/ IRL7/FD7 VDD- DDR MDQ29 MDQ27 MDM2 MDQ19 MA4 MA0 MWE MA2 MBA2 MA1 MBA0 A12 VSS A13 VDDQ A14 VSS VDDQ MODE4/ SCIF3_TXD/ FCLE MODE7/S CIF3_RXD/ FALE VSS MDQ24 MDQ30 VSS MDQ20 VDD- DDR MA12 VSS MA5 VDD- DDR MA11 VSS MA9 A7 A8 A9 A10 A11 CS4 VDD VSS VDD VSS VDD VSS VDD VSS VDD VSS MA7 MA3 MA13 MDQ4 MDQ2 MDQ1 A4 VDDQ A5 VSS A6 VDDQ VSS VDD VDD- DDR MDQ3 VSS MDQ0 VDD- DDR MDQ7 A0 A1 A2 A3 CS3 R/ W VDD VSS MDQ5 MDM0 MDQS0 MDQS 0 MDQ6 MDQ13 D0 VSS D1 VDDQ CS2 VSS VSS VSS VSS VSS VSS VDD VSS MDQ11 VDD- DDR MDQ10 VSS MDQ12 D2 D3 D4 CS0 CS1 RD/ FRAME VDD VSS VSS VSS VSS VSS MDQ8 MDQ15 MDQS1 MDQS 1 MDQ14 MDM1 D5 D6 D7 WE0/ REG D8 D12 VSS VSS VSS VSS VSS VDD MDQ9 VDD- DDR AUDA TA1 AUDA TA0 AUDA TA2 AUDSY NC D9 VSS D10 VDDQ D11 VSS VDD VSS VSS VSS VSS VSS VSS TDO VDDQ AUDA TA3 VSS AUDCK D13 D14 D15 WE1 D16 MODE13 /TCLK/ IOIS16 VSS VDD THDCD THDAS THDAG ASEBRK/ BRKACK TDI TCK D17 VDDQ D18 VSS BS VDDQ VDD VSS VDDQ TMS VSS TRST VDDQ VSSQ- TD D19 D20 D21 D22 BACK/ BSREQ RDY VSS VDD VSS VDD VSS VDD VSS VDD VSS VDD DRAK2 / CE2A DACK1 DREQ1 DACK0 VDDQ- TD THDCTL D23 VSS WE2/ IORD VDDQ BREQ/ BSACK VSS REQ0/ REQOUT VDDQ D52/A D20 VSS DEVSE L/DC LKOUT WE5/ CBE1 VSS IRL0 VDDQ IRL3 VSS DREQ2 / INTB VDDQ DREQ0 VSS STATUS1 /DRAK1 D24 D25 D26 D27 REQ2 REQ1 D58/A D26 D55/A D23 D51/A D19 PCIFRA ME/VS YNC STOP /CDE D47/AD 15/DB3 D42/AD 10/DG4 WE4/ CBE0 D35/AD 3/DR3 IRL1 MRESET OUT/ IRQOUT DACK2/S CIF2_TXD/ MMCCMD/ SIOF_TXD SCIF2_RXD /SIOF_RXD MPMD STATUS0 /DRAK0 XTAL D28 VDDQ D29 VSS D63/A D31 VDDQ D57/A D25 VSS D50/A D18 VDDQ LOCK /ODDF D46/AD 14/DB2 VDDQ D39/AD 7/DG1 VSS IRL2 VDDQ DACK3/S CIF2_SCK/ MMCDAT/ SIOF_SCK VSS NMI VDDQ EXTAL D30 D31 GNT2 GNT0 / GNTIN D62/A D30 D60/A D28 D56/A D24 D54/A D22 D49/A D17/D B5 IRDY/ HSYNC PERR D45/AD 13/DB1 D41/AD 9/DG3 D38/AD 6/DG0 D34/AD 2/DR2 MODE12 /DRAK3/ CE2B CLKO UTENB DREQ3 / INTC VDDQ -PLL2 VDDA- PLL1 VDDQ -PLL1 MODE14 WE3/ IOWR VDDQ GNT1 VDDQ D61/A D29 VSS WE7/ CBE3 VDDQ D48/A D16/D B4 VSS SERR D44/AD 12/DB0 VSS D37/AD 5/DR5 VDDQ INTA VSS VDD- PLL2 VDDQ VDD- PLL1 VDDQ VSSQ- PLL1 VSS GNT3 /MMC CLK PCIRE SET REQ3 PCICLK /DCLKIN D59/A D27 IDSEL D53/A D21 WE6/ CBE2 TRDY /DISP PAR D43/AD 11/DG5 D40/AD 8/DG2 D36/AD 4/DR4 D33/AD 1/DR1 D32/AD 0/DR0 CLKOU T VSS- PLL2 VSSQ- PLL2 VSS- PLL1 VSSA- PLL1 VSS PKG BTM VIEW AB AA Y W V U T R P N M L K J H G F E D C B AB AA Y W V U T R P N M L K J H G F E D C B A A Figure 1.3 SH7785 Pin Arrangement (Bottom View) |
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