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SH7785 Datasheet(PDF) 10 Page - Renesas Technology Corp

Part # SH7785
Description  32-Bit RISC Microcomputer
PDF  1692 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7785 Datasheet(HTML) 10 Page - Renesas Technology Corp

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Rev.1.00 Jan. 10, 2008 Page x of xxx
REJ09B0261-0100
5.2.2
Exception Event Register (EXPEVT)................................................................... 91
5.2.3
Interrupt Event Register (INTEVT)...................................................................... 92
5.2.4
Non-Support Detection Exception Register (EXPMASK) ................................... 93
5.3
Exception Handling Functions............................................................................................. 95
5.3.1
Exception Handling Flow ..................................................................................... 95
5.3.2
Exception Handling Vector Addresses ................................................................. 95
5.4
Exception Types and Priorities ............................................................................................ 96
5.5
Exception Flow .................................................................................................................... 98
5.5.1
Exception Flow..................................................................................................... 98
5.5.2
Exception Source Acceptance ............................................................................ 100
5.5.3
Exception Requests and BL Bit .......................................................................... 101
5.5.4
Return from Exception Handling........................................................................ 101
5.6
Description of Exceptions.................................................................................................. 102
5.6.1
Resets.................................................................................................................. 102
5.6.2
General Exceptions............................................................................................. 104
5.6.3
Interrupts............................................................................................................. 120
5.6.4
Priority Order with Multiple Exceptions ............................................................ 121
5.7
Usage Notes ....................................................................................................................... 123
Section 6 Floating-Point Unit (FPU) .............................................................................. 125
6.1
Features.............................................................................................................................. 125
6.2
Data Formats...................................................................................................................... 126
6.2.1
Floating-Point Format......................................................................................... 126
6.2.2
Non-Numbers (NaN) .......................................................................................... 129
6.2.3
Denormalized Numbers ...................................................................................... 130
6.3
Register Descriptions ......................................................................................................... 131
6.3.1
Floating-Point Registers ..................................................................................... 131
6.3.2
Floating-Point Status/Control Register (FPSCR) ............................................... 133
6.3.3
Floating-Point Communication Register (FPUL) ............................................... 136
6.4
Rounding............................................................................................................................ 137
6.5
Floating-Point Exceptions.................................................................................................. 138
6.5.1
General FPU Disable Exceptions and Slot FPU Disable Exceptions ................. 138
6.5.2
FPU Exception Sources ...................................................................................... 138
6.5.3
FPU Exception Handling .................................................................................... 139
6.6
Graphics Support Functions............................................................................................... 140
6.6.1
Geometric Operation Instructions....................................................................... 140
6.6.2
Pair Single-Precision Data Transfer.................................................................... 141
Section 7 Memory Management Unit (MMU) ............................................................ 143
7.1
Overview of MMU ............................................................................................................ 144



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