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SH7785 Datasheet(PDF) 104 Page - Renesas Technology Corp |
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SH7785 Datasheet(HTML) 104 Page - Renesas Technology Corp |
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104 / 1692 page ![]() 4. Pipelining Rev.1.00 Jan. 10, 2008 Page 74 of 1658 REJ09B0261-0100 I1 I2 I3 ID s1 s2 s3 FS1 FS2 FS3 FS4 FS I1 I2 I3 ID I1 I2 I3 ID s1 s2 s3 FS1 FS2 FS3 FS4 FE1 FE2 FE3 FE4 FE5 FE6 FS I1 I2 I3 ID FE1 FE2 FE3 FE4 FE5 FE6 FS FE1 FE2 FE3 FE4 FE5 FE6 FE1 FE2 FE3 FE4 FE5 FE6 FS FE1 FE2 FE3 FE4 FE5 FE6 FS FE3 FE4 FE5 FE6 FS FE3 FE4 FE5 FE6 FS FE1 FE2 FE3 FE4 FE5 FE6 FS I1 I2 I3 ID I1 I2 I3 ID FE1 FE2 FE3 FE4 FE5 FE6 FS FE3 FE4 FE5 FE6 FS FS I1 I2 I3 ID FS (6-12) Single-precision FABS, FNEG/double-precision FABS, FNEG: 1 issue cycle (6-13) FLDI0, FLDI1: 1 issue cycle (6-14) Single-precision floating-point computation: 1 issue cycle (6-15) Single-precision FDIV/FSQRT: 1 issue cycle (6-16) Double-precision floating-point computation: 1 issue cycle (6-17) Double-precision floating-point computation: 1 issue cycle (6-18) Double-precision FDIV/FSQRT: 1 issue cycle FEDS (Divider occupied cycle) FCMP/EQ, FCMP/GT, FADD, FLOAT, FMAC, FMUL, FSUB, FTRC, FRCHG, FSCHG, FPCHG FCMP/EQ, FCMP/GT, FADD, FLOAT, FSUB, FTRC, FCNVSD, FCNVDS FMUL FEDS (Divider occupied cycle) Figure 4.2 Instruction Execution Patterns (8) |
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