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32186 Datasheet(PDF) 488 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 488 Page - Renesas Technology Corp |
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488 / 1032 page  10.8 TOU (Output-Related 24-Bit Timer) MULTIJUNCTION TIMERS 10 10-192 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 Figure 10.8.19 Typical Operation in Single-shot PWM Output Mode (Reload 1 Register: H’FFFF) Count clock Enable bit H'FFFF H'0000 H'E000 H'E000 H'FFFF Reload 0 register Reload 1 register Interrupt request due to underflow F/F output Data not inverted Counter Enabled (by writing to the enable bit or by external input) Underflow Superficial underflow Undefined value DMA transfer request Timing at which startup requests to other timers are generated Note 1: The value that "reload 0 register - 1" is reloaded. Note 2: The value that "reload 1 register - 1" is reloaded. Note 3: Because reload 0 redister is H'FFFF, pseudo underflow occurs. Notes: • This diagram does not show detailed timing information. • This diagram is shown with respect to the one-count-clock delayed out. H'(FFFF-1) (Note 2) H'(E000-1) (Note 1) (Note 3) |
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