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32186 Datasheet(PDF) 538 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 538 Page - Renesas Technology Corp |
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538 / 1032 page  11 A/D CONVERTER 11-40 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 Table 11.3.3 Conversion Clock Periods in Comparate Mode (Shortest Period) Unit: BCLK Conversion speed Start dummy Execution cycle End dummy 2BCLK mode Slow mode Normal speed 8 84 2 Double speed 8 48 2 Fast mode Normal speed 8 36 2 Double speed 8 24 2 BCLK mode Slow mode Normal speed 4 42 1 Double speed 4 24 1 Fast mode Normal speed 4 18 1 Double speed 4 12 1 Start dummy Execution cycle A/D conversion start trigger Convert operation starts Transferred to the comparate data register End dummy Completed (3) Calculating the conversion time during comparator mode The following schematically shows the method for calculating the conversion time during comparator mode. Figure 11.3.5 Conceptual Diagram of A/D Conversion Time during Comparator Mode 11.3 Functional Description of A/D Converter |
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