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32186 Datasheet(PDF) 537 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 537 Page - Renesas Technology Corp |
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537 / 1032 page ![]() 11 A/D CONVERTER 11-39 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 11.3 Functional Description of A/D Converter (2) Calculating the conversion time when sample-and-hold is enabled The following schematically shows the method for calculating the conversion time when the sample- and-hold function is enabled. Start dummy Execution cycle A/D conversion start trigger Convert operation starts End dummy Completed Sampling time Figure 11.3.4 Conceptual Diagram of A/D Conversion Time when Sample-and-Hold is Enabled Table 11.3.1 Conversion Clock Periods in A/D Conversion Mode when Sample-and-Hold is Disabled or Normal Sample-and-Hold is Enabled (Shortest Period) Unit: BCLK Conversion speed Start dummy Execution cycle End dummy Scan to scan dummy (Note 1) (Note 2) 2BCLK mode Slow mode Normal speed 8 588 2 8 Double speed 8 336 2 8 Fast mode Normal speed 8 252 2 8 Double speed 8 168 2 8 BCLK mode Slow mode Normal speed 4 294 1 4 Double speed 4 168 1 4 Fast mode Normal speed 4 126 1 4 Double speed 4 84 1 4 Note 1: The same applies to both software and hardware triggers. Note 2: Only during scan mode operation, execution time per channel is added. Table 11.3.2 Conversion Clock Periods in A/D Conversion Mode when Fast Sample-and-Hold is Enabled (Shortest Period) Unit: BCLK Conversion speed Start dummy Execution cycle End dummy Scan to scan dummy (Note 1) (Note 2) 2BCLK mode Slow mode Normal speed 8 372 2 8 Double speed 8 186 2 8 Fast mode Normal speed 8 180 2 8 Double speed 8 96 2 8 BCLK mode Slow mode Normal speed 4 186 1 4 Double speed 4 96 1 4 Fast mode Normal speed 4 90 1 4 Double speed 4 48 1 4 Note 1: The same applies to both software and hardware triggers. Note 2: Only during scan mode operation, execution time per channel is added. |
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