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32186 Datasheet(PDF) 555 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 555 Page - Renesas Technology Corp |
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555 / 1032 page ![]() SERIAL INTERFACE 12 12-7 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 Figure 12.2.2 Example for Clearing Interrupt Request Status b4 5 b7 Interrupt request status Initial state Bit 6 event occurs Interrupt request Bit 4 event occurs Only bit 6 cleared Bit 4 data retained b4 5 b7 1 1 0 1 Write to the interrupt request status Example for clearing interrupt request status 0 0 0 0 0 0 1 0 1 0 1 0 1 0 0 0 Program example ISTREG = 0xfd; /* Clear ISTAT1 (0x02 bit) only */ • To clear the Interrupt Request Status Register 0 (ISTREG) interrupt request status 1: ISTAT1 (0x02 bit) To clear an interrupt request status, always be sure to write 1 to all other interrupt request status bits. At this time, avoid using a logic operation like the one shown below. Because it requires three step-ISTREG read, logic operation and write, if another interrupt request occurs between the read and write, status may be inadvertently cleared. b4 5 6 b7 Interrupt request status Bit 6 event occurs Bit 4 event occurs Only bit 6 cleared Bit 4 also cleared 0 0 1 0 1 0 1 0 0 0 0 0 Read 0 0 1 0 0 0 0 0 Clear bit 6 (ANDing with 1101) Write 6 6 ISTREG &= 0xfd; /* Clear ISTAT1 (0x02 bit) only */ 12.2 Serial Interface Related Registers |
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