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32186 Datasheet(PDF) 554 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 554 Page - Renesas Technology Corp |
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554 / 1032 page ![]() SERIAL INTERFACE 12 12-6 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 12.2.1 SIO Interrupt Related Registers The SIO interrupt related registers are used to control the interrupt request signals output from SIO to the Interrupt Controller (ICU), as well as select the source of each interrupt request. (1) Interrupt request status bit This status bit is used to determine whether an interrupt is requested. When an interrupt request occurs, this bit is set in hardware (cannot be set in software). The status bit is cleared by writing "0." Writing "1" has no effect; the bit retains the status it had before the write. Because this bit is unaffected by the interrupt request mask bit, it can also be used to inspect the operating status of peripheral functions. In interrupt handling, make sure that within the grouped interrupt request status, only the status bit for the interrupt request that has been serviced is cleared. If the status bit for any interrupt request that has not been serviced is cleared, the pending interrupt request is cleared simultaneously with its status bit. (2) Interrupt request mask bit This bit is used to disable unnecessary interrupt requests within the grouped interrupt request. Set this bit to "1" to enable interrupt requests or "0" to disable interrupt requests. Figure 12.2.1 Interrupt Request Status and Mask Registers To the Interrupt Controller Interrupt request from each peripheral function Interrupt request status Data bus Set • Group interrupt Interrupt request mask clear F/F F/F Data=0 Serial Interface Related Register Map (2/2) Address +0 address +1 address See b0 b7 b8 b15 pages H'0080 0A18 SIO4 Special Mode Register (Use inhibited area) 12-27 (S4SMOD) | (Use inhibited area) H'0080 0A20 SIO5 Transmit Control Register SIO5 Transmit/Receive Mode Register 12-14 (S5TCNT) (S5MOD) 12-15 H'0080 0A22 SIO5 Transmit Buffer Register 12-19 (S5TXB) H'0080 0A24 SIO5 Receive Buffer Register 12-20 (S5RXB) H'0080 0A26 SIO5 Receive Control Register SIO5 Baud Rate Register 12-21 (S5RCNT) (S5BAUR) 12-24 H'0080 0A28 SIO5 Special Mode Register (Use inhibited area) 12-27 (S5SMOD) 12.2 Serial Interface Related Registers |
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