32186 datasheet(571/1032 Pages) RENESAS

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SERIAL INTERFACE

12-23

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

(6) FLM (Framing Error) bit (Bit 6)

This bit is effective only in UART mode. It is fixed to "0" during CSIO mode. When a framing error

occurs, the received data is stored in the Receive Buffer Register. In this case, an interrupt request

by receive completion occurs but a DMA transfer request does not occur.

[Set condition]

The FLM (Framing Error) bit is set to "1" when the number of received bits does not agree with one

that was set by the SIO Transmit/Receive Mode Register.

[Clear condition]

The FLM bit is cleared to "0" by reading out the lower byte of the SIO Receive Buffer Register or by

clearing the SIO Receive Control Register REN (Receive Enable) bit.

However, if an overrun error occurs, this bit cannot be cleared by reading out the lower byte of the

Receive Buffer Register. In this case, clear the REN (Receive Enable) bit to "0."

(7) ERS (Error Sum) bit (Bit 7)

[Set condition]

This bit is set to "1" when any one of overrun, framing or parity errors is detected at completion of

reception.

[Clear condition]

If the detected error was an overrun error, this bit is cleared by clearing the REN (Receive Enable)

bit to "0." Otherwise, this flag is cleared by reading out the lower byte of the SIO Receive Buffer

12.2 Serial Interface Related Registers

32186 Datasheet(PDF) 571 Page - Renesas Technology Corp