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32186 Datasheet(PDF) 576 Page - Renesas Technology Corp

Part # 32186
Description  MCU
PDF  1032 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

32186 Datasheet(HTML) 576 Page - Renesas Technology Corp

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SERIAL INTERFACE
12
12-28
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
(5) CKPOL (Transfer/Receive Clock Polarity Select) bit (Bit 7)
This bit is used to select the transmit/receive clock polarity in the CSIO mode.
By setting this bit to “0,” a data is output from the TXD pin synchronously with SCLK falling edge, and
a data is fetched from the RXD pin synchronously with SCLK rising edge.
By setting this bit to “1,” a data is output from the TXD pin synchronously with SCLK rising edge, and
a data is fetched from the RXD pin synchronously with SCLK falling edge.
Note: • Change the SIO special mode register value in the inhibiting state for both transmit enable
bit and receive enable bit.
Figure 12.2.9 Selection of Transmit/Receive Clock Polarity
RXD
Transmit/receive clock
TXD
RXD
Transmit/receive clock
TXD
Note: • "L" level is output from the SCLKO pin when no data is transmitted and received during internal clock selection.
(1) When clock polarity select bit = "0"
(2) When clock polarity select bit = "1"
b7
b6
b5
b4
b3
b2
b1
b0
b7
b6
b5
b4
b3
b2
b1
b0
b7
b6
b5
b4
b3
b2
b1
b0
b7
b6
b5
b4
b3
b2
b1
b0
12.2 Serial Interface Related Registers



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