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32186 Datasheet(PDF) 580 Page - Renesas Technology Corp

Part # 32186
Description  MCU
PDF  1032 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

32186 Datasheet(HTML) 580 Page - Renesas Technology Corp

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SERIAL INTERFACE
12
12-32
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
12.3.3 Starting CSIO Transmission
The serial interface starts a transmit operation when all of the following conditions are met after being
initialized.
(1) Transmit conditions when CSIO mode internal clock is selected
• The SIO Transmit Control Register transmit enable bit is set to "1."
• Transmit data (8-16 bits) is written to the lower byte of the SIO Transmit Buffer Register (transmit buffer
empty bit = "0") (Note 1) (Note 2)
(2) Transmit conditions when CSIO mode external clock is selected
• The SIO Transmit Control Register transmit enable bit is set to "1."
• Transmit data is written to the lower byte of the SIO Transmit Buffer Register (transmit buffer empty bit =
"0") (Note 1)
• A falling edge of transmit clock on the SCLKI pin is detected.
When transmission starts, the serial interface sends data following the procedure described below.
• Transfer the content of the SIO Transmit Buffer Register to the SIO Transmit Shift Register.
• Set the transmit buffer empty bit to "1" (Note 3).
• Start sending data synchronously with the shift clock.
Note 1: While the transmit enable bit is cleared to "0," writes to the Transmit Buffer Register are
ignored. Always set the transmit enable bit to "1" before writing to the Transmit Buffer
Register. Also, the transmit status bit is set to "1" at the time data is set in the lower byte of
the SIO Transmit Buffer Register.
Note 2: When the internal clock is selected, a write to the lower byte of the Transmit Buffer
Register triggers transmission to start.
Note 3: A transmit interrupt request can be generated for reasons that the transmit buffer is empty or
transmission has finished. Also, a DMA transfer request can be generated when the transmit
buffer is empty. No DMA transfer requests can be generated for reasons that transmission has
finished.
12.3.4 Successive CSIO Transmission
Once data has been transferred from the transmit buffer register to the transmit shift register, the next data
can be written to the transmit buffer register even when the serial interface has not finished sending the
previous data. If the next data is written to the transmit buffer register before transmission has finished, the
previous and the next data are transmitted successively.
Check the SIO Transmit Control Register’s Status Register’s transmit buffer empty flag to see if data has
been transferred from the transmit buffer register to the transmit shift register.
12.3 Transmit Operation in CSIO Mode



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