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32186 Datasheet(PDF) 605 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 605 Page - Renesas Technology Corp |
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605 / 1032 page ![]() SERIAL INTERFACE 12 12-57 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 Figure 12.7.2 Receive Operation during UART Mode (Hardware Processing) The following processing is automatically performed in hardware. Receive data Yes Yes No Transfer data from the SIO Receive Shift Register to the SIO Receive Buffer Register Set the SIO Receive Control Register reception finished bit to "1" Set the receive status bit to "1" Overrun error ? Parity error or framing error ? Receive conditions met ? Start bit detected normally ? No Set the SIO Receive Control Register overrun error bit and error sum bit to "1" Set the SIO Receive Control Register's corresponding error bit and receive error sum bit to "1" No UART receive operation starts End of UART reception Yes No Yes 12.7 Receive Operation in UART Mode |
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