32186 datasheet(607/1032 Pages) RENESAS

607 / 1032 page

SERIAL INTERFACE

12-59

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

Figure 12.7.4 Example of UART Reception (When Overrun Error Occurred)

TXD

RXD

Note 1: Changes of the Interrupt Controller's SIO Receive Interrupt Control Register interrupt request bit

Note 2: When reception finished interrupt is enabled

Note 3: When receive error interrupt is enabled

Note 4: This is done by clearing the receive enable bit to "0."

Note 5: The Interrupt Controller's IVECT register is read or the SIO Receive Interrupt Control Register interrupt

request bit cleared

Receive enable bit

(SIO Receive Control Register)

Reception finished bit

RXD

Set

: Processing by software

: Interrupt request generated

Receive buffer not read

during this interval

First data reception

completed

Next data reception

completed

(Note 5)

Overrun error bit

cleared (Note 4)

Overrun error bit

Set

SIO receive interrupt request

(Note 1)

(When reception finished

interrupt is selected)

Reception finished

interrupt request

Interrupt request accepted (Note 5)

Receive error interrupt request

(Note 3)

Interrupt request accepted (Note 5)

(When receive error

interrupt is selected)

(Note 2)

12.7 Receive Operation in UART Mode

32186 Datasheet(PDF) 607 Page - Renesas Technology Corp

32186 Datasheet(HTML) 607 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL