32186 datasheet(681/1032 Pages) RENESAS

681 / 1032 page

CAN MODULE

13-71

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

13.2.13 CAN Clock Select Registers

CAN0 Clock Select Register (CAN0CKSEL)

<Address: H’0080 101B>

CAN1 Clock Select Register (CAN1CKSEL)

<Address: H’0080 141B>

b15

CANCKSP

00000000

CANCKS

Bit Name

Function

8–13

No function assigned. Fix to "0."

CANCKSP

CANCKS write control bit

CANCKS

0: CPUCLK/4 clock

CAN module clock select bit

1: CPUCLK/2 clock

Note: • Use in CANCKS=0 (CPUCLK/4 Clock selection). If operate CANCKS=1 (CPUCLK/2 Clock selection) it is not guaranteed.

These registers switch the clock supplied to the protocol engine block of CAN module.

To set these registers, follow the procedure described below.

1. Confirm the status CAN module is reset.

2. Write a "1" to CANCKSP (CANCKS write control) bit.

3. Subsequent to 2 above, write a "0" to CANCKSP (CANCKS write control) bit and a "set value" to CANCKS

(CAN module clock select) bit.

Note: • If theare are writing cycles from CPU, DMA, SDI (tool), NBD to any other area between 2 and

3, the continuous setting ( A pair of two consecutive is 1 set for writing operation) is disabled

and the writing value is not reflected. Therefore, disable interrupts and DMA transfers before

setting. However the writing cycle from RTD and DRI are not effected.

13.2 CAN Module Related Registers

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