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32186 Datasheet(PDF) 773 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 773 Page - Renesas Technology Corp |
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773 / 1032 page ![]() DIRECT RAM INTERFACE (DRI) 14 14-25 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 14.2.9 DRI Data Capture Event Count Setting Register DRI Data Capture Event Count Setting Register (DRIDCAPNUM) <Address: H'0080 2010> b0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 b15 DCAPNUM 0000000000000000 b16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 b31 DCAPNUM 0000000000000000 <Upon exiting reset: H'0000 0000> b Bit Name Function R W 0–13 No function assigned. Fix to "0." 00 14–31 DCAPNUM RW Transfer Event Count Note: • This register must always be accessed in halfword or word units beginning with even addresses. This register is used to set the number of events, at occurrence of which data is taken in. The value set in this register is used as the reload value for the DRI capture event counter(DRIDCAPCT) and the DRI transfer counter(DRITRMCT). Since the DRI performs data transfers in 32-bit units, make sure the value set in this register satisfies the requirement given below depending on how DWDSL(input data bus width select) bits in the DRI Data Capture Control Register(DRIDCAPCNT) are set: • When selected to be 8 bits, a multiple of 4 (equal to or greater than 4) • When selected to be 16 bits, a multiple of 2 (equal to or greater than 2) • When selected to be 32 bits, any value (equal to or greater than 1) Also be careful that the total amount of captured data will not exceed the RAM area supported by the DRI. Note: • This register can only be rewritten when DCPEN(capture enable) bit in the DRI Data Capture Control Register(DRIDCAPCNT) is "0." 14.2 DRI Related Registers |
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