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32186 Datasheet(PDF) 774 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 774 Page - Renesas Technology Corp |
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774 / 1032 page ![]() DIRECT RAM INTERFACE (DRI) 14 14-26 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 14.2.10 DRI Capture Event Counter DRI Capture Event Counter (DRIDCAPCT) <Address: H'0080 2014> b0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 b15 DCAPCT 0000000000000000 b16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 b31 DCAPCT 0000000000000000 <Upon exiting reset: H'0000 0000> b Bit Name Function R W 0–13 No function assigned. Fix to "0." 00 14–31 DCAPCT R– Capture event counter Note: • This register must always be accessed in word (32 bit) units from the halfword boundary(The lower address B’00). The DRI Capture Event Counter is an 18-bit counter to count data capture events. When DCPEN(capture enable) bit in the DRI Data Capture Control Register(DRIDCAPCNT) changes state from data capture disabled to enabled, this counter is reloaded with the value of the DRI Data Capture Event Count Setting Register(DRIDCAPNUM). Thereafter, the counter is decremented by one each time data is taken in. Then, when the DRI capture event counter is decremented to H’0000 0000, it stops counting. 14.2 DRI Related Registers |
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