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32186 Datasheet(PDF) 815 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 815 Page - Renesas Technology Corp |
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815 / 1032 page ![]() EXTERNAL BUS INTERFACE 17 17-5 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 17.2 External Bus Interface Related Registers The following describes the external bus interface related registers. 17.2.1 Port Operation Mode and Port Peripheral Function Select Registers Ports P0–P4 (except P41–P43), P124, P125, P224 and P225 are switched for external access signal pins during external extension mode when so set by the corresponding Operation Mode Register. During processor mode, these ports always function as external access signal pins. During external extension mode, these pins are switched for port upon exiting reset. Therefore, by switching the pin functions for only those pins that are needed for external access, the remaining pins can be used as port. Ports P70–P73, P126, P127, P150, P153, P220 and P221 can be switched for external access signal pins at any time irrespective of the CPU operation mode. Ports P41–P43 always function as external access signal pins during external extension and processor modes. P0 Operation Mode Register (P0MOD) <Address: H’0080 0740> <Upon exiting reset: H’00> b Bit Name Function R W 0 P00MD 0: P00/DD0 (Note 1) R W Port P00 operation mode bit 1: DB0/TO21 (Note 2) 1 P01MD 0: P01/DD1 (Note 1) R W Port P01 operation mode bit 1: DB1/TO22 (Note 2) 2 P02MD 0: P02/DD2 (Note 1) R W Port P02 operation mode bit 1: DB2/TO23 (Note 2) 3 P03MD 0: P03/DD3 (Note 1) R W Port P03 operation mode bit 1: DB3/TO24 (Note 2) 4 P04MD 0: P04/DD4 (Note 1) R W Port P04 operation mode bit 1: DB4/TO25 (Note 2) 5 P05MD 0: P05/DD5 (Note 1) R W Port P05 operation mode bit 1: DB5/TO26 (Note 2) 6 P06MD 0: P06/DD6 (Note 1) R W Port P06 operation mode bit 1: DB6/TO27 (Note 2) 7 P07MD 0: P07/DD7 (Note 1) R W Port P07 operation mode bit 1: DB7/TO28 (Note 2) Note 1: The port and DD input functions both are effective. To use the port as DD input pin, set the port direction for input. Note 2: Which function of the pin is used depends on how the P0 Peripheral Function Select Register is set. Note: • During processor mode, settings of this register have no effect, and the ports function as external bus interface signal pins (DB0-DB7). 17.2 External Bus Interface Related Registers b0 12 3456 b7 P00MD P01MD P02MD P03MD P04MD P05MD P06MD P07MD 000 0000 0 |
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