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32186 Datasheet(PDF) 147 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 147 Page - Renesas Technology Corp |
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147 / 1032 page ![]() 6 INTERNAL MEMORY 6-5 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 RAM Write Source Status Register (RAMWRFST) <Address: H'0080 0534> <Upon exiting reset: H'0000> b Bit Name Function R W 0 RAMWRFST0 0: Write to area 0 by DMA R (Note 1) (Area 0 RAM write source status bit) 1: Write to area 0 by CPU, SDI, or NBD 1 RAMWRFST1 0: Write to area 1 by DMA R (Note 1) (Area 1 RAM write source status bit) 1: Write to area 1 by CPU, SDI, or NBD 2 RAMWRFST2 0: Write to area 2 by DMA R (Note 1) (Area 2 RAM write source status bit) 1: Write to area 2 by CPU, SDI, or NBD 3 RAMWRFST3 0: Write to area 3 by DMA R (Note 1) (Area 3 RAM write source status bit) 1: Write to area 3 by CPU, SDI, or NBD 4 RAMWRFST4 0: Write to area 4 by DMA R (Note 1) (Area 4 RAM write source status bit) 1: Write to area 4 by CPU, SDI, or NBD 5 RAMWRFST5 0: Write to area 5 by DMA R (Note 1) (Area 5 RAM write source status bit) 1: Write to area 5 by CPU, SDI, or NBD 6 RAMWRFST6 0: Write to area 6 by DMA R (Note 1) (Area 6 RAM write source status bit) 1: Write to area 6 by CPU, SDI, or NBD 7 RAMWRFST7 0: Write to area 7 by DMA R (Note 1) (Area 7 RAM write source status bit) 1: Write to area 7 by CPU, SDI, or NBD 8 RAMWRFST8 0: Write to area 8 by DMA R (Note 1) (Area 8 RAM write source status bit) 1: Write to area 8 by CPU, SDI, or NBD 9 RAMWRFST9 0: Write to area 9 by DMA R (Note 1) (Area 9 RAM write source status bit) 1: Write to area 9 by CPU, SDI, or NBD 10 RAMWRFST10 0: Write to area 10 by DMA R (Note 1) (Area 10 RAM write source status bit) 1: Write to area 10 by CPU, SDI, or NBD 11 RAMWRFST11 0: Write to area 11 by DMA R (Note 1) (Area 11 RAM write source status bit) 1: Write to area 11 by CPU, SDI, or NBD 12 RAMWRFST12 0: Write to area 12 by DMA R (Note 1) (Area 12 RAM write source status bit) 1: Write to area 12 by CPU, SDI, or NBD 13 RAMWRFST13 0: Write to area 13 by DMA R (Note 1) (Area 13 RAM write source status bit) 1: Write to area 13 by CPU, SDI, or NBD 14 RAMWRFST14 0: Write to area 14 by DMA R (Note 1) (Area 14 RAM write source status bit) 1: Write to area 14 by CPU, SDI, or NBD 15 RAMWRFST15 0: Write to area 15 by DMA R (Note 1) (Area 15 RAM write source status bit) 1: Write to area 15 by CPU, SDI, or NBD Note 1: Only writing "0" is effective. Writing "1" has no effect; the bit retains the value it had before the write. If the CPU, SDI (tool), or NBD attempted to access any area for write that is “disabled against write” by the RAM Write Disable Control Register, the corresponding bit in this register is set to "1." After setting the bit to "1," the bit is not cleared to "0" if a DMA write access occurred. The bit is cleared by writing a "0" in software. Writing a "1" to any bit in this register has no effect, so the bit retains the value it had before the write. b0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 b15 RAMWRFST0 RAMWRFST1 RAMWRFST3 RAMWRFST4 RAMWRFST5 RAMWRFST8 0000000000000000 RAMWRFST15 RAMWRFST14 RAMWRFST13 RAMWRFST12 RAMWRFST11 RAMWRFST10 RAMWRFST9 RAMWRFST7 RAMWRFST6 RAMWRFST2 6.3 Internal RAM Protect Function |
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