32186 datasheet(158/1032 Pages) RENESAS

158 / 1032 page

INTERNAL MEMORY

6-16

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

6.5 Registers Associated with Internal Flash Memory

6.5.2 Flash Status Register

Flash Status Register (FSTAT)

<Address: H’0080 01E1>

Bit Name

Function

FBUSY

0: Being programmed or erased

–

Flash busy bit

1: Ready state

No function assigned. Fix to "0."

ERASE

0: Erase normally operating or terminated

–

Erase status confirmation bit

1: Erase error occurred

WRERR

0: Programming normally operating or terminated

–

Write status confirmation bit

1: Programming error occurred

No function assigned. Fix to "0."

FESQ1

?–

Reserved bit

FESQ2

?–

Reserved bit

No function assigned. Fix to "0."

Flash Status Register (FSTAT) consists of the following status bits that indicate the operation condition of the

flash memory.

(1) FBUSY (Flash Busy) bit (Bit 8)

The FBUSY bit is used to determine whether the operation on the flash memory is finished when it is being

programmed or erased. When FBUSY = "0," it means that the programming or erase operation is being

executed; when FBUSY = "1," the operation is finished.

Note: • Except when programming/erase processing on the flash memory is forcibly terminated, do not

manipulate the FRESET bit in Flash Control Register 4 (FCNT4) while the FBUSY bit = "0"

(programming/erasure in progress).

(2) ERASE (Erase Status Confirmation) bit (Bit 10)

The ERASE bit is used to determine after execution of processing whether the erase operation performed

on the flash memory resulted in an error. When ERASE = "0," it means that the erase operation terminated

normally; when ERASE = "1," the erase operation terminated in an error.

This bit is set to "1" (Erase error occurred) in the following cases:

• An invalid command is issued

• The operation is not executed under normal erase conditions (power voltage, temperature)

• Protect function by lock bit attempts to erase the valid area

• Erase operation is not available because of the internal flash memory failure

(3) WRERR (Write Status Confirmation) bit (Bit 11)

The WRERR bit is used to determine after completion of processing whether the programming operation

performed on the flash memory resulted in an error. When WRERR = "0," it means that the programming

operation terminated normally; when WRERR = "1," the programming operation terminated in an error.

This bit is set to "1" (Programming error occurred) in the following cases:

• An invalid command is issued

• The operation is not executed under normal programming conditions (power voltage, temperature)

• Protect function by lock bit attempts to write to the valid area

• Write operation is not available because of the internal flash memory failure

11121314

b15

FBUSY

ERASE

WRERR

FESQ1

FESQ2

00000

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