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32186 Datasheet(PDF) 164 Page - Renesas Technology Corp

Part # 32186
Description  MCU
PDF  1032 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

32186 Datasheet(HTML) 164 Page - Renesas Technology Corp

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6
INTERNAL MEMORY
6-22
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
b8
9
10
11121314
b15
FLOCKST
FRESET
000
0000
0
Flash Control Register 4 (FCNT4)
<Address: H’0080 01E5>
<Upon exiting reset: H’00>
b
Bit Name
Function
R
W
8–10
No function assigned. Fix to "0."
00
11
FLOCKST
0: Protected
(Note1) –
Lock bit status bit
1: Unprotected
12–14
No function assigned. Fix to "0."
00
15
FRESET
0: No operation
R
W
Flash reset bit
1: Reset
Note1: Under setting FLOCKS bit of the flash control register 2 as "1" (register read mode), only the reading out value becomes
effective after issuing read rock bit status command . The reading out value is undefined after issuing that read rock bit
status command under setting FLOCKS bit as "0"(memory area read mode) and that other internal flash control command.
(1) FLOCKST (Lock Bit Status) bit (Bit 11)
The FLOCKST bit is used to read the lock bit status. If the FLOCKST bit = "0," it means that the relevant
memory block is protected. If the FLOCKST bit = "1," it means that the relevant memory block is not pro-
tected.
Confirmation of the lock bit status by the FLOCKST bit is possible when the FLOCKS bit = "1." In this case,
the lock bit status can be checked by first issuing command data H’7171 and H’D0D0 to any address of the
target block in succession and then, when the FBUSY bit is set to "1," by reading the FLOCKST bit.
(2) FRESET (Flash Reset) bit (Bit 15)
The FRESET bit controls forcible termination of the internal flash memory programming/erase operation,
initialization (to H’80) of each status bit in the Flash Status Register (FSTAT), and initialization of the
FPBSYCK bit in Flash Control Register 3 (FCNT3).
Setting the FRESET bit to "1" forcibly terminates programming/erase operation and initializes each status
bit in the FSTAT (to H’80) and the FPBSYCK bit in FCNT3. Make sure FRESET is held high (= "1") for at
least 10 µs during a flash reset.
After a flash reset, the internal flash memory is disabled against access until the FAENS bit is set to "1."
The FRESET bit is effective only when the FENTRY bit = "1." Unless the FENTRY bit = "1," settings made
to the FRESET bit are ignored. Make sure the FRESET bit = "0" while programming or erasing the flash
memory.
6.5 Registers Associated with Internal Flash Memory



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