HD64F7047 datasheet(164/764 Pages) RENESAS

164 / 764 page

Rev. 2.00, 09/04, page 124 of 720

Repeat Mode: Performs the transfer of one byte, one word, or one longword for each activation.

Either the transfer source or transfer destination is designated as the repeat area. Table 8.3 lists the

From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the

initial state of the transfer counter and the address register specified as the repeat area is restored,

and transfer is repeated. In repeat mode the transfer counter value does not reach H'00, and

therefore CPU interrupts cannot be requested when DISEL = 0.

Table 8.3

Repeat Mode Register Functions

Values Written Back upon a Transfer Information Write

Function

When DTCRA is other than 1

When DTCRA is 1

DTMR

Operation mode

control

DTMR

DTCRAH

Transfer count save

DTCRAH

DTCRAL

Transfer count

DTCRAL – 1

DTCRAH

DTIAR

Initial address

(Not written back)

DTSAR

Transfer source

address

Increment/decrement/fixed

(DTS = 0) Increment/

decrement/fixed

(DTS = 1) DTIAR

DTDAR

Transfer destination

address

Increment/decrement/fixed

(DTS = 0) DTIAR

(DTS = 1) Increment/

decrement/fixed

Transfer

DTSAR

DTDAR

DTSAR

Repeat area

Figure 8.7 Memory Mapping in Repeat Mode

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