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HD64F7047 Datasheet(PDF) 165 Page - Renesas Technology Corp |
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HD64F7047 Datasheet(HTML) 165 Page - Renesas Technology Corp |
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165 / 764 page ![]() Rev. 2.00, 09/04, page 125 of 720 Block Transfer Mode: Performs the transfer of one block for each one activation. Either the transfer source or transfer destination is designated as the block area. The block length is specified between 1 and 65536. When the transfer of one block ends, the initial state of the block size counter and the address register specified as the block area is restored. The other address register is then incremented, decremented, or left fixed. From 1 to 65,536 transfers can be specified. Once the specified number of transfers have ended, a CPU interrupt is requested. Table 8.4 Block Transfer Mode Register Functions Register Function Values Written Back upon a Transfer Information Write DTMR Operation mode control DTMR DTCRA Transfer count DTCRA – 1 DTCRB Block length (Not written back) DTSAR Transfer source address (DTS = 0) Increment/ decrement/ fixed (DTS = 1) DTSAR initial value DTDAR Transfer destination address (DTS = 0) DTDAR initial value (DTS = 1) Increment/ decrement/ fixed Transfer DTSAR or DTDAR DTDAR or DTSAR Block area • • • First block Nth block Figure 8.8 Memory Mapping in Block Transfer Mode |
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