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HD64F7047 Datasheet(PDF) 171 Page - Renesas Technology Corp |
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HD64F7047 Datasheet(HTML) 171 Page - Renesas Technology Corp |
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171 / 764 page  Rev. 2.00, 09/04, page 131 of 720 8.5 Cautions on Use 8.5.1 Prohibition against DTC Register Access by DTC DTC register access by the DTC is prohibited. 8.5.2 Module Standby Mode Setting DTC operation can be disabled or enabled using the module standby control register. The initial setting is for DTC operation to be halted. Register access is enabled by clearing module standby mode. When the MSTP24 and MSTP25 bits in MSTCR1 are set to 1, the DTC clock is halted and the DTC enters module standby mode. Do not write 1 on MSTP24 bit or MSTP25 bit during activation of the DTC. For details, refer to section 24, Power-Down Modes. 8.5.3 On-Chip RAM The DTMR, DTSAR, DTDAR, DTCRA, DTCRB and DTIAR registers are all located in on-chip RAM. When the DTC is used, the RAME bit in SYSCR must not be cleared to 0. |
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