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HD64F7047 Datasheet(PDF) 244 Page - Renesas Technology Corp

Part # HD64F7047
Description  Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series
PDF  764 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F7047 Datasheet(HTML) 244 Page - Renesas Technology Corp

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Rev. 2.00, 09/04, page 204 of 720
Examples of Buffer Operation:
1. When TGR is an output compare register
Figure 10.16 shows an operation example in which PWM mode 1 has been designated for
channel 0, and buffer operation has been designated for TGRA and TGRC. The settings used
in this example are TCNT clearing by compare match B, 1 output at compare match A, and 0
output at compare match B.
As buffer operation has been set, when compare match A occurs the output changes and the
value in buffer register TGRC is simultaneously transferred to timer general register TGRA.
This operation is repeated each time that compare match A occurs.
For details of PWM modes, see section 10.4.5, PWM Modes.
TCNT value
TGRB_0
H'0000
TGRC_0
TGRA_0
H'0200
H'0520
TIOCA
H'0200
H'0450
H'0520
H'0450
TGRA_0
H'0450
H'0200
Transfer
Time
Figure 10.16 Example of Buffer Operation (1)



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