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7906 Datasheet(PDF) 264 Page - Renesas Technology Corp |
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7906 Datasheet(HTML) 264 Page - Renesas Technology Corp |
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264 / 531 page ![]() SERIAL I/O 7906 Group User’s Manual Rev.2.0 11-23 11.3 Clock synchronous serial I/O mode 11.3.3 Method of transmission Figure 11.3.2 shows an initial setting example for relevant registers when transmitting. Transmission is started when all of the following conditions (➀ to ➂) has been satisfied. When an external clock is selected, satisfy conditions ➀ to ➂ with the following preconditions satisfied. <Preconditions> The CLKi pin’s input is at “H” level (External clock selected, when the CLK polarity select bit = “0”) The CLKi pin’s input is at “L” level (External clock selected, when the CLK polarity select bit = “1”) Note: When an internal clock is selected, the above preconditions are ignored. ➀ Transmit data is present in the UARTi transmit buffer register (transmit buffer empty flag = “0”) ➁ Transmission is enabled (transmit enable bit = “1”). ➂ The CTSi pin’s input is at “L” level (when the CTS function selected). Note: When the CTS function is not selected, condition ➂ is ignored. By connecting the RTSi pin (receiver side) and CTSi pin (transmitter side), the timing of transmission and that of reception can be matched. For details, refer to section “11.3.6 Receive operation.” When using interrupts, it is necessary to set the relevant registers to enable interrupts. For details, refer to “CHAPTER 6. INTERRUPTS.” Figure 11.3.3 shows the write operation of data after transmission start, and Figure 11.3.4 shows the detect operation of transmit completion. |
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