7906 datasheet(276/531 Pages) RENESAS

276 / 531 page

SERIAL I/O

7906 Group User’s Manual Rev.2.0

11-35

[Precautions for clock synchronous serial I/O mode]

1. A transfer clock is generated by operation of the transmit control circuit. Accordingly, even when performing

only reception, the transmit operation (in other words, setting for transmission) must be performed. In this

case, be sure to set as follows. Additionally, in this case, dummy data is output from the TxDi pin to the

external:

• When performing reception, be sure to enable the reception after dummy data is set to the low-order

byte of the UARTi transmit buffer register. Also, be sure to set dummy data at each 1-byte data

reception.

• At reception, be sure to set the receive enable bit and transmit enable bit to “1” simultaneously.

When performing only reception, if any of the TxD0/P13 and TxD1/P17 switch bits (bits 2 and 3 at address

AC16) is set to “1,” the corresponding TxDi pin can be used as a programmable I/O port pin.

2. When an external clock is selected, with the input level at the CLKi pin = “H” (the CLK polarity select bit

= “0”) or “L” (the CLK polarity select bit = “1”), be sure to satisfy all of the following three conditions:

➀ Transmit data is written to the UARTi transmit buffer register.

➁ The transmit enable bit is set to “1.”

➂ “L” level is input to the CTSi pin (when the CTS function selected).

➀ Dummy data is written to the UARTi transmit buffer register.

➁ The receive enable bit is set to “1.”

➂ The transmit enable bit is set to “1.”

3. While the CTSi/RTSi separation is selected, the CLKi pin cannot be used. Accordingly, in the clock

synchronous serial I/O mode, the CTSi/RTSi separation cannot be selected.

4. Writing to the UARTi baud rate register (BRGi) must be performed while transmission/reception halts.

5. When an internal clock is selected, do not use the RTS function because the RTS output is undefined.

6. When performing transmission, be sure to clear any of the TxD0/P13 and TxD1/P17 switch bits to “0” (bits

2 and 3 at address AC16).

7906 Datasheet(PDF) 276 Page - Renesas Technology Corp