7906 datasheet(290/531 Pages) RENESAS

290 / 531 page

7906 Group User’s Manual Rev.2.0

11-49

SERIAL I/O

11.4 Clock asynchronous serial I/O (UART) mode

Fig. 11.4.11 Processing after reception is completed

[When not using interrupts]

[When using interrupts]

A UARTi receive interrupt request

occurs when reception is completed.

UARTi receive interrupt

Processing after reading out receive data

UART0 receive buffer register (Addresses 3716, 3616)

UART1 receive buffer register (Addresses 3F16, 3E16)

b15

Reading of receive data

Read out receive data.

UART0 transmit/receive control register 1 (Address 3516)

UART1 transmit/receive control register 1 (Address 3D16)

Receive complete flag

0 : Reception not completed

1 : Reception completed

Checking completion of reception

UART0 transmit/receive control register 1 (Address 3516)

UART1 transmit/receive control register 1 (Address 3D16)

Checking error

Framing error flag

Parity error flag

Error sum flag

0 : No error

1 : Error detected

Notes 1: When performing the processing after the reception is completed, using an interrupt,

be sure to select the receive interrupt (UARTi receive interrupt mode select bit = “0”).

2: This figure shows the bits and registers required for the processing.

See Figure 11.4.13 for the change of flag state and the occurrence timing of an

interrupt request.

UART0 transmit/receive control register 1 (Address 3516)

UART1 transmit/receive control register 1 (Address 3D16)

Checking error

Overrun error flag

0 : No overrun error

1 : Overrun error detected

(Note 1)

7906 Datasheet(PDF) 290 Page - Renesas Technology Corp

7906 Datasheet(HTML) 290 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL