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M68HC08 Datasheet(PDF) 25 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 188 page  Memory Input/Output Section MC68HC908RF2 — Rev. 4.0 Data Sheet MOTOROLA Memory 25 $0028 Timer Channel 1 Status and Control Register (TSC1) See page 143. Read: CH1F CH1IE 0 MS1A ELS1B ELS1A TOV1 CH1MAX Write: 0 Reset: 00000000 $0029 Timer Channel 1 Register High (TCH1H) See page 146. Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: Indeterminate after reset $002A Timer Channel 1 Register Low (TCH1L) See page 146. Read: Bit 7 654321 Bit 0 Write: Reset: Indeterminate after reset $002B ↓ $0035 Unimplemented $0036 Internal Clock Generator Control Register (ICGCR) See page 88. Read: CMIE CMF CMON CS ICGON ICGS ECGON ECGS Write: Reset: 00001000 $0037 Internal Clock Generator Multiplier Register (ICGMR) See page 90. Read: R N6N5 N4N3N2N1N0 Write: Reset: 00010101 $0038 Internal Clock Generator Trim Register (ICGTR) See page 90. Read: TRIM7 TRIM6 TRIM5 TRIM4 TRIM3 TRIM2 TRIM1 TRIM0 Write: Reset: 10000000 $0039 ICG DCO Divider Control Register (ICGDVR) See page 91. Read: RRRR DDIV3 DDIV2 DDIV1 DDIV0 Write: Reset: 0000 UUUU $003A ICG DCO Stage Register (ICGDSR) See page 91. Read: DSTG7 DSTG6 DSTG5 DSTG4 DSTG3 DSTG2 DSTG1 DSTG0 Write: Reset: Unaffected by reset $003B Reserved RRRRRRRR $003C ↓ $003F Unimplemented $FE00 SIM Break Status Register (SBSR) See page 126. Read: RRRRRR SBSW R Write: See Note Reset: 0 Note: Writing a 0 clears SBSW Addr. Register Name Bit 7 654321 Bit 0 = Unimplemented R = Reserved U = Unaffected X = Indeterminate Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 5) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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