M68HC08 datasheet(77/188 Pages) FREESCALE

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Internal Clock Generator Module (ICG)

Usage Notes

MC68HC908RF2 — Rev. 4.0

Data Sheet

MOTOROLA

Internal Clock Generator Module (ICG)

Figure 6-7. Code Example for Switching Clock Sources

6.4.2 Enabling the Clock Monitor

Many applications require the clock monitor to determine if one of the clock sources

has become inactive, so the other can be used to recover from a potentially

dangerous situation. Using the clock monitor requires both clocks to be active

(ECGON and ICGON both set). To enable the clock monitor, both clocks also must

be stable (ECGS and ICGS both set). This is to prevent the use of the clock monitor

when a clock is first turned on and potentially unstable.

Enabling the clock monitor and clock monitor interrupts requires a flow similar to

this flow:

Enable the alternate clock source

Wait for both clock sources to be stable

Switch to the desired clock source if necessary

Enable the clock monitor

Enable clock monitor interrupts

These events must happen in sequence. A short assembly code example of how

to employ this flow is shown in Figure 6-8. This code is for illustrative purposes only

and does not represent valid syntax for any particular assembler.

Figure 6-8. Code Example for Enabling the Clock Monitor

;Clock Switching Code Example

;This code switches from Internal to External clock

;Clock Monitor and interrupts are not enabled

start

lda

#$13

;Mask for CS, ECGON, ECGS

;If switching from External to Internal, mask is $0C.

loop

;Other code here, such as writing the COP, since ECGS may

;take some time to set

sta

icgcr

;Try to set CS, ECGON and clear ICGON. ICGON will not

;clear until CS is set, and CS will not set until

;ECGON and ECGS are set.

cmpa

icgcr

;Check to see if ECGS set, then CS set, then ICGON clear

bne

loop

;Keep looping until ICGON is clear.

;Clock Monitor Enabling Code Example

;This code turns on both clocks, selects the desired

; one, then turns on the Clock Monitor and Interrupts

start

lda

#$AF

;Mask for CMIE, CMON, ICGON, ICGS, ECGON, ECGS

; If Internal Clock desired, mask is $AF

; If External Clock desired, mask is $BF

; If interrupts not desired mask is $2F int; $3F ext

loop

;Other code here, such as writing the COP, since ECGS

; and ICGS may take some time to set.

sta

icgcr

;Try to set CMIE. CMIE wont set until CMON set; CMON

; won’t set until ICGON, ICGS, ECGON, ECGS set.

brset

6,ICGCR,error ;Verify CMF is not set

cmpa

icgcr

;Check if ECGS set, then CMON set, then CMIE set

bne

loop

;Keep looping until CMIE is set.

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