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TSC2117 Datasheet(PDF) 7 Page - Texas Instruments |
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TSC2117 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 192 page ![]() 3.2 Recommended Operating Conditions 3.3 Electrical Characteristics TSC2117 Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller www.ti.com SLAS550A – APRIL 2009 – REVISED JUNE 2009 over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT AVDD(1) Referenced to AVSS(2) 2.7 3.3 3.6 DVDD Referenced to DVSS(2) 1.65 1.8 1.95 HVDD Referenced to HVSS(2) 2.7 3.3 3.6 SLVDD(1) Power-supply voltage range Referenced to SLVSS(2) 2.7 5.5 V SRVDD(1) Referenced to SRVSS(2) 2.7 5.5 TSVDD Referenced to TSVSS(2) 2.7 3.3 3.6 IOVDD Referenced to IOVSS(2) 1.1 3.3 3.6 VREF External voltage reference Referenced to AVSS(2) 0 3.3 AVDD V Resistance applied across class-D output pins Speaker impedance 8 Ω (BTL) Headphone impedance AC coupled to RL 16 Ω Analog audio full-scale input VI AVDD = 3.3V, single-ended 0.707 VRMS voltage Stereo line output load AC coupled to RL 10 k Ω impedance MCLK(3) Master clock frequency IOVDD = 3.3V 50 MHz SCLK frequency IOVDD = 3.3V 30 MHz SCLK SCLK duty cycle 40% 50% 60% SCL SCL clock frequency 400 kHz TA Operating free-air temperature –40 85 °C (1) To minimize battery-current leakage, the SLVDD and SRVDD voltage levels should not be below the AVDD voltage level. (2) All grounds on board are tied together, so they should not differ in voltage by more than 0.2 V maximum for any combination of ground signals. By use of a wide trace or ground plane, ensure a low-impedance connection between HVSS and DVSS. (3) The maximum input frequency should be 50 MHz for any digital pin used as a general-purpose clock. At 25 °C, AVDD, HVDD, IOVDD, TSVDD, = 3.3 V, SLVDD, SRVDD = 3.6V, DVDD = 1.8 V, VREF = 3.3 V, f S (audio) = 48 kHz, CODEC_CLKIN = 256 × f S, PLL = Off, SAR input is AUX1, VOL/MICDET pin disabled (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SAR CONVERTER Auxilary Analog Input Input voltage range 0 VREF V Input impedance(1) 1/(f ×C) k Ω AUX1, AUX2, VBAT input selected as input by touch screen Input capacitance 25 pF Input leakage current 1 µA Input voltage range for VBAT Battery-measurement mode 0 6 V (1) SAR input impedance is dependent on the sampling frequency, where the sampling capacitor is C = 25 pF. Submit Documentation Feedback ELECTRICAL SPECIFICATIONS 7 |
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