ATmega32U2 datasheet(190/314 Pages) ATMEL

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190

7799B–AVR–07/09

ATmega8U2/16U2/32U2

When the USB controller is in reset state:

• USBE is not set

• the USB controller clock is stopped in order to minimize the power consumption (FRZCLK=1)

• the USB controller is disabled

• USB is in the suspend mode

• the Device USB controllers internal state is reset

• The DPACC bit and the DPADD10:0 field can be set by software. The DPRAM is not cleared.

• The SPDCONF bits can be set by software

After setting USBE, the USB Controller enters in the Device state.

The USB Controller can at any time be reset by clearing USBE.

20.4.3

Interrupts

Two interrupts vectors are assigned to the USB controller.

Figure 20-8. USB Interrupt System

The USB module distinguishes between USB General events and USB Endpoints events.

Figure 20-9. USB General interrupt vector sources

The WAKEUP interrupt allows device wake-up from power-down mode, and is an asynchronous

interrupt, triggering each time a state change is detected on the data lines. The other interrupts

are synchronous and will be detected only if the USB clock is enabled (FRZCLK bit set).

USB Device

Interrupt

USB General

Interrupt Vector

Endpoint

Interrupt

USB Endpoint/Pipe

Interrupt Vector

UPRSMI

UDINT.6

UPRSME

UDIEN.6

EORSMI

UDINT.5

EORSME

UDIEN.5

WAKEUPI

UDINT.4

WAKEUPE

UDIEN.4

EORSTI

UDINT.3

EORSTE

UDIEN.3

SOFI

UDINT.2

SOFE

UDIEN.2

SUSPI

UDINT.0

SUSPE

UDIEN.0

USB General

Interrupt Vector

Asynchronous Interrupt source

(allows the CPU to wake up from power down mode)

ATmega32U2 Datasheet(PDF) 190 Page - ATMEL Corporation

ATmega32U2 Datasheet(HTML) 190 Page - ATMEL Corporation

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