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ATmega32U2 Datasheet(PDF) 196 Page - ATMEL Corporation |
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ATmega32U2 Datasheet(HTML) 196 Page - ATMEL Corporation |
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196 / 314 page ![]() 196 7799B–AVR–07/09 ATmega8U2/16U2/32U2 buffers. • Bit 5:4 – UPDRV[1:0]: USB direct drive values These bits are relevant only when one of the direct drive modes for USB is enable. When UPWE[1:0] is 1:0 the values of these bits are output to USB. The value written to UPDRV1 is output to D+. The value written to UPDRV0 is output to D-. • Bits 3:2 – Res: Reserved These bits are reserved and should always read as zero. • Bit 1 – DPI: D+ Input value This bit is read only, the value read from this bit reflects the D+ pin (USB buffer). This bit is set one by hardware if a one logic level is read on D+. This bit is set to zero by hardware if a zero logic level is read on D+. • Bit 0 – DMI: D- Input value This bit is read only, the value read from this bit reflects the D- pin (USB buffer). This bit is set one by hardware if a logic one is read on D-. This bit is set to zero by hardware if a logic zero logic is read on D-. 20.10.3 REGCR – Regulator Control Register • Bit 0 – REGDIS: Regulator Disable Writing this bit to a logic one disables the internal 3.3V regulator. Writing this bit to a logic zero enables the regulstor. Table 20-2. UPWE[I:0] Bits Settings UPWE1 UPWE0 Mode 00 Direct drive is disabled. 01 Reserved 10 Direct drive of DP/DM (UPDRV[1:0] values) 11 Reserved Bit 76543210 (0x63) ------- REGDIS REGCR Read/Write RRRRRRR R/W Initial Value 00000000 |
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