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PCIMX258CJM4A Datasheet(PDF) 39 Page - Freescale Semiconductor, Inc |
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PCIMX258CJM4A Datasheet(HTML) 39 Page - Freescale Semiconductor, Inc |
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39 / 144 page ![]() i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3 Freescale Semiconductor 39 Note: 1. Maximum condition for tpr, tpo, tpi, and tpv: wcs model, 1.1 V, I/O 3.0 V, and 105 °C. Minimum condition for tpr, tpo, and tpv: bcs model, 1.3 V, I/O 3.6 V and –40 °C. Input transition time from core is 1 ns (20%–80%). 2. Minimum condition for tps: wcs model, 1.1 V, I/O 3.0 V, and 105 °C. tps is measured between VIL to VIH for rising edge and between VIH to VIL for falling edge. Output pad propagation delay (max. drive), 40%–60% input signals and crossing of output signals tpo 15 pF 35 pF 1.67/1.57 2.11/2.02 2.39/2.24 2.97/2.82 3.45/3.21 4.23/3.99 ns 1 Output pad propagation delay (high drive), 40%–60% input signals and crossing of output signals tpo 15 pF 35 pF 1.85/1.75 2.52/2.42 2.65/2.49 3.51/3.36 3.79/3.55 4.97/4.72 ns Output pad propagation delay (standard drive), 40%–60% input signals and crossing of output signals tpo 15 pF 35 pF 2.42/2.32 3.76/3.66 3.40/3.25 5.15/4.99 4.83/4.59 7.17/6.92 ns Output enable to output valid delay (max. drive), 50%–50% tpv 15 pF 35 pF 1.37/1.34 1.77/1.83 2.22/2.02 2.77/2.63 3.53/3.12 4.30/3.92 ns 1 Output enable to output valid delay (high drive), 50%–50% tpv 15 pF 35 pF 1.55/1.56 2.15/2.29 2.46/2.30 3.28/3.21 3.87/3.47 5.02/4.67 ns Output enable to output valid delay (standard drive), 50%–50% tpv 15 pF 35 pF 2.07/2.18 3.28/3.65 3.20/3.08 4.84/4.90 4.92/4.50 7.21/6.89 ns Output enable to output valid delay (max. drive), 40%–60% tpv 15 pF 35 pF 1.46/1.42 1.77/1.81 2.28/2.07 2.71/2.56 3.54/3.13 4.15/3.78 ns — Output enable to output valid delay (high drive), 40%–60% tpv 15 pF 35 pF 1.60/1.59 2.07/2.18 2.47/2.30 3.12/3.02 3.82/3.41 4.72/4.37 ns Output enable to output valid delay (standard drive), 40%–60% tpv 15 pF 35 pF 2.01/2.09 2.96/3.26 3.05/2.91 4.34/4.37 4.64/4.23 6.45/6.13 ns Output pad slew rate (max. drive) tps 25 pF 50 pF 1.11/1.20 0.60/0.65 1.74/1.75 0.93/0.95 2.63/2.48 1.39/1.29 V/ns 2 Output pad slew rate (high drive) tps 25 pF 50 pF 0.75/0.81 0.40/0.43 1.16/1.18 0.62/0.64 1.76/1.65 094/0.87 V/ns Output pad slew rate (standard drive) tps 25 pF 50 pF 0.38/0.41 0.20/0.22 0.59/0.61 0.31/0.32 0.89/0.83 0.47/0.43 V/ns Output pad dI/dt (max. drive) tdit 25 pF 50 pF 89 95 202 213 435 456 mA/ns 3 Output pad dI/dt (high drive) tdit 25 pF 50 pF 60 63 135 142 288 302 mA/ns Output pad dI/dt (standard drive) tdit 25 pF 50 pF 29 31 67 70 144 150 mA/ns Input pad transition times trfi 1.0 pF 0.07/0.08 0.11/0.12 0.16/0.20 ns 4 Input pad propagation delay, 50%–50% tpi 1.0 pF 0.56/0.69 0.87/1.08 1.37/1.62 ns Input pad propagation delay, 40%–60% tpi 1.38/1.51 1.68/1.89 2.18/2.42 Table 26. AC Parameters for SDRAM pbijtov18_33_ddr_clk I/O (continued) Parameter Symbol Load Condition Min. Rise/Fall Typ. Max. Rise/Fall Units Notes |
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