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PCIMX258CJM4A Datasheet(PDF) 48 Page - Freescale Semiconductor, Inc |
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PCIMX258CJM4A Datasheet(HTML) 48 Page - Freescale Semiconductor, Inc |
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48 / 144 page ![]() i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3 48 Freescale Semiconductor 3.7.2.3 Ultra DMA (UDMA) Mode Timing UDMA mode timing is more complicated than PIO mode or MDMA mode. In this section, timing diagrams for UDMA in- and out-transfers are provided. 3.7.2.3.1 UDMA In-Transfer Timing Figure 15 shows the timing for UDMA in-transfer start. Figure 15. Timing for UDMA In-Transfer Start tf(write) — tf(min.–write) = time_k × T – (tskew1 + tskew2 + tskew6) time_k tL — tL(max.) = (time_d + time_k–2) × T – (tsu + tco + 2 × tbuf + 2 × tcable2) time_d, time_k3 tn, tj tkjn tn= tj= tkjn = (max.(time_k,. time_jn) × T – (tskew1 + tskew2 + tskew6) time_jn —ton toff ton = time_on × T – tskew1 toff = time_off × T – tskew1 — 1 See Figure 13. 2 See Figure 14. 3 tk1 in the UDMA figures equals (tk –2 × T). Table 36. Timing Parameters for MDMA Read and Write Modes (continued) ATA Parameter MDMA Read1 and Write2 Timing Parameters Relation Adjustable Parameter(s) DMARQ ADDR DIOR DIOW IORDY DATA READ DMACK tack tenv tds tdh tc1 tc1 |
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