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PCIMX258CJM4A Datasheet(PDF) 94 Page - Freescale Semiconductor, Inc |
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PCIMX258CJM4A Datasheet(HTML) 94 Page - Freescale Semiconductor, Inc |
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94 / 144 page ![]() i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3 94 Freescale Semiconductor Figure 66. LCDC TFT Mode Timing Diagram 3.7.13 Pulse Width Modulator (PWM) Timing Parameters Figure 67 depicts the timing of the PWM, and Table 71 lists the PWM timing characteristics. The PWM can be programmed to select one of three clock signals as its source frequency. The selected clock signal is passed through a prescaler before being input to the counter. The output is available at the pulse width modulator output (PWMO) external pin. Table 70. LCDC TFT Mode Timing Parameters ID Description Min. Ma Unit T1 Pixel clock period 22.5 1000 ns T2 HSYNC width 1 — T1 1 T is pixel clock period T3 LD setup time 5 — ns T4 LD hold time 5 — ns T5 Delay from the end of HSYNC to the beginning of the OE pulse 3 — T1 T6 Delay from end of OE to the beginning of the HSYNC pulse 1 — T1 T6 OE T5 Line 1 Line 2 Line n Line 1 VSYNC HSYNC LSCLK LD T1 T2 T3 T4 HSYNC |
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