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AFE5801 Datasheet(PDF) 13 Page - Texas Instruments |
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AFE5801 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 46 page ![]() fIN − Input Frequency − MHz −12 −11 −10 −9 −8 −7 −6 −5 −4 −3 −2 −1 0 1 0 2 4 6 8 10 12 14 16 18 20 G010 14MHz 7.5MHz 10MHz f − Frequency − MHz −70 −60 −50 −40 −30 −20 −10 0 10 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 G011 K = 2dB K = 3dB K = 5dB K = 4dB K = 6dB K = 8dB K = 9dB K = 10dB Analog Filter K = 7dB f − Clock Frequency − MSPS 0 50 100 150 200 250 300 350 400 450 0 10 20 30 40 50 60 70 G012 AVDD Power − Default fIN = 2MHz AVDD Power − Low-Noise Mode f − Clock Frequency − MSPS 0.30 0.35 0.40 0.45 0.50 0.55 0.60 5 10 15 20 25 30 35 40 45 50 55 60 65 G013 Total Power − Low-Noise Mode Total Power − Default fin = 2MHz GAIN_MATCHING − dB 0 1 2 3 4 5 6 7 0.02 0.07 0.12 0.17 0.22 0.27 0.32 0.37 0.42 0.47 0.52 G030 Output Code − Offset 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 2005 2016 2027 2038 2049 2060 2071 2072 2083 G031 AFE5801 www.ti.com SLOS591D – SEPTEMBER 2008 – REVISED MAY 2010 TYPICAL CHARACTERISTICS (continued) All graphs are at 25°C, AVDD3 = 3.3V, AVDD18 = DVDD18 = 1.8V, –1dBFS analog input AC coupled with 0.1mF, internal reference mode, maximum rated channel sampling frequency (65MSPS), LVCMOS (single-ended) clock, 50% duty cycle, fIN = 2MHz, anti-aliasing filter set at 14MHz (3dB corner), output clamp disable and analog high-pass filter enabled. spacer Figure 18. Antialiasing Filter Frequency Response Figure 19. High-Pass Filter Options Figure 20. Analog Power vs Input-Clock Frequency Figure 21. Total Power vs Input-Clock Frequency Figure 22. Gain Matching Measured at a Single Gain (30 Figure 23. Offset (Average Code) With Signal. Every dB) as Peak-to-Peak Variation of Gain Across Channels Channel Counted as One Event on Every Device and Measured at Three Temperatures. Every Device at Each Temperature Counted as One Event Copyright © 2008–2010, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link(s): AFE5801 |
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