AFE5801 datasheet(27/46 Pages) TI

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AFE5801

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SLOS591D – SEPTEMBER 2008 – REVISED MAY 2010

START_GAIN

Address: 0x97[5:0]

This 6 bit register specifies the start gain value from –5dB to 31dB.

START_GAIN = [–5 + REG_VALUE ] dB

REG_VALUE

GAIN

0x0

–5 dB

0x1

–4 dB

0x24

31 dB

STOP_GAIN (Not a programmable register; it is an internally computed value.)

Case 1:

INTERP_ENABLE = 1,

STOP_GAIN = START_GAIN + (STOP_INDEX – START_INDEX) – ( 2 × Number of

decrements) + 0.875dB.

Case 2:

INTERP_ENABLE = 0,

STOP_GAIN = START_GAIN + (STOP_INDEX – START_INDEX) – ( 2 × Number of

decrements).

HOLD_GAIN_TIME

Address: 0x98[7:0]

This 8 bit register specifies the time for holding of the STOP_GAIN, after reaching either the STOP_GAIN

value as computed in the STOP_GAIN section or the maximum/minimum gain. After this time, the TGC starts

stepping down to the START_GAIN value in 1dB steps every Tclk. The STOP_GAIN value is held for the

following number of clocks:

HOLD_GAIN_TIME = [33 × REG_VALUE] Tclks

where Tclk is the channel sampling clock.

REG_VALUE

HOLD_GAIN_TIME

0x0

0 Tclks

0x1

33 Tclks

0xFF

8415 Tclks

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