MAC7200 datasheet(402/976 Pages) FREESCALE

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Introduction

MAC7200 Microcontroller Family Reference Manual, Rev. 2

324

Freescale Semiconductor

16.1.2

General Operation

The AIPS is the interface between the AHB-Lite 2.v6 interface and on-chip IPS v3.0 peripherals as shown

in Figure 16-1.

Figure 16-1. AIPS Interface Block Diagram

IPS peripherals are modules that contain readable/writable control and status registers. The AHB master

reads and writes these registers through the AIPS. The AIPS generates module enables, the module

address, transfer attributes, byte enables and write data as inputs to the IPS peripherals. The AIPS captures

read data from the IPS interface and drives it on the AHB.

The AIPS occupies a 64MByte portion of the address space. A 0.5MByte portion of this space is allocated

to on-platform peripherals. The remaining 63.5MBytes are available for off-platform devices. The register

maps of the IPS peripherals are located on 16Kbyte boundaries. Each IPS peripheral is allocated one

16Kbyte block of the memory map, and is activated by one of the module enables from the AIPS. Up to

thirty-two 16Kbyte external IPS peripherals may be implemented, occupying contiguous blocks of

16Kbytes. Two global external IPS module enables are available for the remaining 63Mbytes of address

space to allow for customization and expansion of addressed peripheral devices. In addition, a single

“non-global” module enable is also asserted whenever any of the thirty-two non-global module enables is

asserted.

The AIPS memory map is shown in Figure 16-2.

The connection of a particular module enable to a peripheral, and hence the exact address assignment for

an IPS peripheral is system dependent, and is defined in the system specification. Each IPS peripheral

selects its internal registers based on the address driven.

Direct Memory

Access

ARM7TDMI-S

CPU

Cross-Bar

Switch

Peripheral

Bus Bridge

External

Interface Module

Random Access

Memory Controller

Master Modules

Slave Modules

SPP

Peripheral 31

SPP

Peripheral 0

IPS

Peripheral 31

IPS

Peripheral 0

IPS

Global 0

IPS

Global 1

SPP

Peripherals

IPS

Peripherals

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