MAC7200 datasheet(398/976 Pages) FREESCALE

398 / 976 page

Initialization/Application Information

MAC7200 Microcontroller Family Reference Manual, Rev. 2

320

Freescale Semiconductor

length burst transfer or a locked transfer. In this case the new requesting master will have to wait until the

end of the burst transfer or locked transfer before it will be granted control of the slave port.

If the new requesting master’s priority level is lower than that of the master that currently has control of

the slave port the new requesting master will be forced to wait until the master that currently has control

of the slave port either runs an IDLE cycle or runs a non IDLE cycle to a location other than the current

slave port.

15.5.1.2

Round-Robin Priority Operation

When operating in round-robin mode, each master is assigned a relative priority based on the master port

number. This priority is based on how far ahead the master port number of the requesting master is to the

master port number of the current bus master for this slave. Master port numbers are compared modulo the

total number of bus masters, i. e. take the requesting master port number minus the current bus master’s

port number modulo the total number of bus masters. The master port whose priority is the highest based

on this comparison will be granted control over the slave port at the next bus transfer boundary.

For the case of only the two bus masters on this device, this means when operating in round-robin mode,

if the core complex is the current bus master for a given slave, than the DMA has the highest priority when

requesting that slave. Likewise, if the DMA is the current bus master for a given slave, then the core

complex has the highest priority when requesting that slave.

Once granted access to a slave port, a master may perform as many transfers as desired to that port until

another master makes a request to the same slave port. The next master in line will be granted access to

the slave port at the next transfer boundary.

Parking may still be used in a round-robin mode, but will not affect the round-robin pointer unless the

parked master actually performs a transfer. Handoff will occur to the next master in line after one cycle of

arbitration. If the slave port is put into low power park mode the round-robin pointer will be reset to point

at master port 0, giving it the highest priority.

15.5.2

Priority Assignment

Each master port needs to be assigned a unique 1 bit priority level. If an attempt is made to program

multiple master ports with the same priority level within the priority register (PR) the crossbar switch bus

will respond with a bus error and the registers will not be updated.

15.6

Initialization/Application Information

No initialization is required by or for the crossbar switch bus. Hardware reset ensures all the register bits

used by the crossbar switch bus are properly initialized.

15.7

AXBS Bus Aborts

15.7.1

IPI Register Interface

The AXBS module supports Peripheral Bus bus aborts, and enforces the following memory map:

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