MAC7200 datasheet(397/976 Pages) FREESCALE

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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

319

The CR can only be accessed with 32-bit accesses. Once the RO (Read Only) bit has been set in the CR

the CR can only be read, attempts to write to it will have no effect on the CR and result in an error response.

15.5

Functional Description

This section describes in more detail the functionality of the crossbar switch bus.

15.5.1

Arbitration

The crossbar switch bus supports two arbitration schemes; a simple fixed-priority comparison algorithm,

and a simple round-robin fairness algorithm. The arbitration scheme is independently programmable for

each slave port.

15.5.1.1

Fixed Priority Operation

When operating in fixed-priority mode, each master is assigned a unique priority level in the PR (Priority

selected priority register will gain control over the slave port.

Any time a master makes a request to a slave port the slave port checks to see if the new requesting master’s

priority level is higher than that of the master that currently has control over the slave port (unless the slave

port is in a parked state). The slave port does an arbitration check at every bus transfer boundary to ensure

that the proper master (if any) has control of the slave port.

If the new requesting master’s priority level is higher than that of the master that currently has control of

the slave port the new requesting master will be granted control over the slave port at the next clock edge.

The exception to this rule is if the master that currently has control over the slave port is running a fixed

7–6

Control Register Reserved. These bits are reserved for future expansion. They are read as zero and should be

written with zero for upward compatibility.

5–4

PCTL

Parking Control. These bits determine the parking control used by this slave port.

These bits are initialized by hardware reset. The reset value is 00.

00 When no master is making a request the arbiter will park the slave port on the master port defined by the PARK

bit field.

01 When no master is making a request the arbiter will park the slave port on the last master to be in control of the

slave port.

10 When no master is making a request the arbiter will park the slave port on no master and will drive all outputs to

a constant safe state.

11 Reserved

3–1

Slave General Purpose Control Register Reserved. This bit is reserved for future expansion. It is read as zero and

should be written with zero for upward compatibility.

PARK

PARK - This bit is used to determine which master port this slave port parks on when no masters are actively making

requests and the PCTL bits are set to 00.

This bit is initialized by hardware reset. The reset value is 0.

0 Park on CORE Master Port.

1 Park on DMA Master Port.

Table 15-7. Control Register Descriptions (Continued)

Name

Description

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