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MAC7200 Datasheet(PDF) 396 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 396 Page - Freescale Semiconductor, Inc

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Register Descriptions
MAC7200 Microcontroller Family Reference Manual, Rev. 2
318
Freescale Semiconductor
slave port to inactive states when no master is requesting an access. The low power park feature can result
in an overall power savings if the slave port is not saturated; however, it will force an extra clock of latency
whenever any master tries to access it when it is not in use because it will not be parked on any master.
The PARK bits determine which master the slave will park on when no master is making an active request
and there is no request for low power mode. Please use caution to only select master ports that are actually
present in the design.
Table 15-6. Control Register Summary
CR_FC
CR_FB
CR_RC
CR_AHB
CR_PC
Control Register for Slave Port to Flash Controller
Control Register for Slave Port to FlexBus
Control Register for Slave Port to RAM Conttroller
Control Register for Slave Port to external AHB
Control Register for Slave Port to Peripheral Controller
crossbar_base + 0x010
crossbar_base + 0x110
crossbar_base + 0x310
crossbar_base + 0x510
crossbar_base + 0x710
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
RO
HLP
Type
rw1
1. Once this bit is written to a 1 only hardware reset will return it to a 0.
rw
r
r
rrrrrrrrrrrr
Reset
0
00
0
000000000000
Bit
15
14
13
12
11
10
9876543210
Name
ARB
PCTL
Park
Type
r
r
r
r
r
r
rw
rw
r
r
rw
rw
r
r
r
rw
Reset
0
00
0
000000000000
Table 15-7. Control Register Descriptions
Name
Description
31
RO
Read Only. This bit is used to force all of a slave port’s registers to be read only. Once written to 1 it can only be
cleared by hardware reset.
This bit is initialized by hardware reset. The reset value is 0.
0 All this slave port’s registers can be written.
1 All this slave port’s registers are read only and cannot be written (attempted writes have no effect and result in an
error response).
30
HLP
Halt Low Priority. This bit is used to set the initial arbitration priority for low power mode requests.
This bit is initialized by hardware reset. The reset value is 0
0 The low power mode request has the highest priority for arbitration on this slave port.
1 The low power mode request has the lowest initial priority for arbitration on this slave port.
29–10
Control Register Reserved. These bits are reserved for future expansion. They read as zero and should be written
with zero for upward compatibility.
9–8
ARB
Arbitration Mode. These bits are used to select the arbitration policy for the slave port.
These bits are initialized by hardware reset. The reset value is 00.
00 Fixed Priority.
01 Round Robin (rotating) Priority.
10 Reserved
11 Reserved



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