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MAC7200 Datasheet(PDF) 409 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 409 Page - Freescale Semiconductor, Inc |
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409 / 976 page  Memory Map/Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 331 16.4.3 Register Descriptions 16.4.3.1 Master Privilege Registers (MPROT) Each MPR specifies eight 4-bit fields defining the access privilege level associated with a bus master. The registers provide one field per bus master. 0xFC08_8000 – 0xFC08_BFFF CRG – Clock and Reset Generator OPACR2 0xFC08_C000 – 0xFC08_FFFF PIT – Programmable Interval Timer OPACR3 0xFC09_0000 – 0xFC09_3FFF RFU 0xFC09_4000 – 0xFC09_7FFF FlexCAN_A – CAN Controller 0 OPACR5 0xFC09_8000 – 0xFC09_BFFF FlexCAN_B – CAN Controller 1 OPACR6 0xFC09_C000 – 0xFC0A_BFFF RFU 0xFC0A_C000 – 0xFC0A_FFFF IIC – Inter-IC bus OPACR11 0xFC0B_0000 – 0xFC0B_3FFF RFU 0xFC0B_4000 – 0xFC0B_7FFF DSPI_A – Serial Peripheral Interface 0 OPACR13 0xFC0B_8000 – 0xFC0B_BFFF DSPI_B – Serial Peripheral Interface 1 OPACR14 0xFC0B_C000 – 0xFC0B_FFFF DSPI_C – Serial Peripheral Interface 2 OPACR15 0xFC0C_0000 – 0xFC0C_3FFF RFU 0xFC0C_4000 – 0xFC0C_7FFF ESCI_A – Enhanced Serial Communication Interface 0 OPACR17 0xFC0C_8000 – 0xFC0C_BFFF ESCI_B – Enhanced Serial Communication Interface 1 OPACR18 0xFC0C_C000 – 0xFC0D_BFFF RFU 0xFC0D_C000 – 0xFC0D_FFFF eMIOS – Enhanced Modular I/O Subsystem OPACR23 0xFC0E_0000 – 0xFC0E_3FFF ATD – Analog to Digital Converter OPACR24 0xFC0E_4000 – 0xFC0E_7FFF RFU 0xFC0E_8000 – 0xFC0E_BFFF PIM – Port Integration Module OPACR26 0xFC0E_C000 – 0xFC0E_FFFF RFU 0xFC0F_0000 – 0xFC0F_3FFF PFM – Platform Flash Module registers OPACR28 0xFC0F_4000 – 0xFFFF_FFFF RFU Access: User read/write 32 10 R 0 MTR MTW MPL W Reset 0 1 1 1 Figure 16-3. Master Protection Registers (MPROT) Table 16-3. MAC7200 Peripheral to Access Control Register Map (Continued) Address Range Module Access Control Register |
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