MAC7200 datasheet(411/976 Pages) FREESCALE

411 / 976 page

Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

333

Presence or absence of a particular PACR is based on whether the associated peripheral is present in the

platform, as denoted by the synthesis configuration parameters defined in Section 16.5.1, “AIPS

Scalability.” When absent, the corresponding PACR is not implemented and will read as 0’s. Writes will

be ignored.

16.4.3.3

Off-Platform Peripheral Access Control Registers (OPACRs)

Each of the off-platform peripherals have an Off-platform Peripheral Access Control Register (OPACR)

which defines the access levels supported by the given module. Each OPACR has a format identical to the

PACR described in Section 16.4.3.2, “Peripheral Access Control Registers (PACR).”

Each OPACR corresponds to the equivalent off-platform peripheral; OPACR0 corresponds to off-platform

peripheral0, etc., with OPACR32 corresponding to off-platform global peripheral0, and OPACR33

corresponding toff-platform global peripheral1.

Presence or absence of a particular OPACR is design implementation dependent. When absent, the

corresponding OPACR is not implemented and will read as 0’s. Writes will be ignored.

16.5

Functional Description

The AIPS serves as an interface between an AHB 2.v6 system bus and the IPS peripheral bus. It functions

as a protocol translator. Accesses which fall within the address space of the AIPS are decoded to provide

individual module selects for peripheral devices on the IPS interface.

16.5.1

AIPS Scalability

The AIPS is configurable to support eight masters, from one to thirty-two fixed-size on-platform

peripherals, thirty-two fixed-size off-platform peripherals, and two off-platform global peripherals.

16.5.1.1

Peripheral Presence

When a particular peripheral or set of peripherals are not present in a design, those peripheral memory

spaces which are not present will not be accessible by software and will be terminated with an AHB

ERROR response by the AIPS.

Supervisor Protect. This bit determines whether the peripheral requires supervisor privilege level for access.

0 This peripheral does not require supervisor privilege level for accesses.

1 This peripheral requires supervisor privilege level for accesses. The master privilege level must indicate

supervisor via the hprot[1] access attribute, and the MPROTx[MPL] control bit for the master must be set. If not,

the access is terminated with an error response and no peripheral access is initiated on the IPS bus.

Reserved, should be cleared.

Table 16-5. PACR Field Descriptions (Continued)

Field

Description

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