MAC7200 datasheet(410/976 Pages) FREESCALE

410 / 976 page

Memory Map/Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

332

Freescale Semiconductor

Accesses to registers or register fields which correspond to master or peripheral locations which are not

implemented will return zeros on reads, and will be ignored on writes.

16.4.3.2

Peripheral Access Control Registers (PACR)

Each of the on-platform peripherals have a Peripheral Access Control Register which defines the access

levels supported by the given module. Each PACR has the following format:

Table 16-4. MPROT Field Descriptions

Field

Description

MPL

Master Privilege Level. This bit determines how the privilege level of the master is determined.

0 Accesses from this master are forced to user-mode regardless of the master’s access attribute.

1 Accesses from this master are not forced to user-mode. The master’s access attribute is used directly to

determine the peripheral’s access attribute

MTW

Master Trusted for Writes. This bit determines whether the master is trusted for write accesses

0 This master is not trusted for write accesses.

1 This master is trusted for write accesses.

MTR

Master Trusted for Reads. This bit determines whether the master is trusted for read accesses

0 This master is not trusted for read accesses.

1 This master is trusted for read accesses.

Reserved, should be cleared.

Access: User read/write

Reset, PACR0

Reset, PACRn

010

Figure 16-4. Peripheral Access Control Registers (PACR)

Table 16-5. PACR Field Descriptions

Field

Description

Trusted Protect. This bit determines whether the peripheral allows accesses from an untrusted master.

0 Accesses from an untrusted master are allowed.

1 Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access

is terminated with an error response and no peripheral access is initiated on the IPS bus.

Write Protect. This bit determines whether the peripheral allows write accesses

0 This peripheral allows write accesses.

1 This peripheral is write protected. If a write access is attempted, the access is terminated with an error response

and no peripheral access is initiated on the IPS bus.

MAC7200 Datasheet(PDF) 410 Page - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 410 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL