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MAC7200 Datasheet(PDF) 430 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 430 Page - Freescale Semiconductor, Inc |
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430 / 976 page ![]() FlexBus Differences from MAC71xx MAC7200 Microcontroller Family Reference Manual, Rev. 2 352 Freescale Semiconductor Supervisor Access: Unused 17.5.2 FlexBus Interface In addition to the IPI interface, the FlexBus can also abort external bus transfers. The following transfers will be aborted: • Transfers to an external bus address which does not map into any chip select address range 17.6 FlexBus Differences from MAC71xx • The FlexBus interface has numerous small differences from the EIM. Please refer to the respective Block Guides for differences in programming interface and protocol. — Changed offset of registers from $0080 to $0000 — Changed max number of wait states from 15 to 63 — Added Secondary Wait State functionality (SWS, SWSEN bits in the CSCR) — Added Extended Transfer Start functionality (EXTS bit in the CSCR) — Added Address Setup and Hold functionality (ASET, RDAH, WDAH bits in the CSCR) — Added Multiplexed address Mode (MUX bit in the CSCR) Table 17-9. FlexBus Bus Aborts Abort Allowed $0000-$3fff None Table 17-10. MAC71x1 to MAC72xx External Bus mapping MAC71x1 MAC72xx A[21:0] ADDR[21:0] D[15:0] DATA[15:0] CS0 CS0 CS1 CS1 CS2 CS2 OE OE BS0 BWE0 BS1 BWE1 RW RW CLKOUT CLKOUT TA TA AS - - TBST |
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