MAC7200 datasheet(445/976 Pages) FREESCALE

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PFLASH Application Usage

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

367

The PFAPR[31:4] register bits may not be locked. PFAPR[3:2] may be locked by clearing PFCR2[17],

and PFAPR[1:0] may be locked by clearing PFCR2[16]

18.7.4.1.3

PFCR2 - PFLASH Configuration Register 2

The PFCR2 register contains register locking, Shadow SACC/DACC and line buffer configuration.

The PFCR2 register is not lockable.

18.7.4.1.4

PFSACC - PFLASH Supervisor/user ACCess

The PFSACC register contains the SACC for the main array.

The PFSACC register may be locked (i.e., writes are not allowed) by clearing PFCR2[22].

18.7.4.1.5

PFDACC - PFLASH Data/instruction ACCess

The PFDACC register contains the SACC for the main array.

Bits

Function

Reseta

a. The reset value is determined by the state of the Flash. The reset values shown are for a

fully erased Shadow Block.

[31:30] LBCFG - Line Buffer Configuration

[29:24] Reserved for future use

11111

[23]

CR1UNL - Enable Writes to the PFCR1 register

[22]

SACCUNL - Enable Writes to the PFSACC register

[21]

DACCUNL - Enable Writes to the PFDACC register

[20:18] Reserved for future use

111

[17:16] MPAUNL - Enable Writes to the M0AP/M1AP bits in the PFAPR

[17] - M1AP

[16] - M0AP

[15:8]

SHSACC - Shadow Supervisor/User Access

0 = Supervisor only allowed

1 = Supervisor or User allowed

$ff

[7:0]

SHDACC - Shadow Data/Instruction Access

0 = Data only allowed

1 = Data or Instruction allowed

$ff

Bits

Function

Reseta

a. The reset value is determined by the state of the Flash. The reset values shown are for a

fully erased Shadow Block.

[31:0]

SACC - Main Array Supervisor/User Access

0 = Supervisor only allowed

1 = Supervisor or User allowed

$ffff ffff

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